# Principal Post-Silicon Validation Engineer at Astera Labs

- Company: Astera Labs
- Status: Open
- Workplace: On-site
- Location: San Jose, California, United States
- Level: Principal
- Discipline: Backend
- Employment: Full-time
- Posted: 2026-10-20
- Skills: CXL, Ethernet, NVLink, PCIe, UALink
- Apply: https://job-boards.greenhouse.io/asteralabs/jobs/4736479005

## Description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . 
 Role Overview 
 Astera Labs is looking for a Principal Post-Silicon Validation Engineer to take our connectivity silicon from first-silicon bring-up to production-ready. You will own the validation strategy for high-speed interconnect products, characterize real silicon in the lab, and drive root-cause analysis of the toughest system-level issues.
 As AI workloads scale into rack-level infrastructure, every link has to perform flawlessly. Your work will directly shape the quality, performance, and time-to-market of the products that connect the world's most advanced AI platforms, in a hyper-growth company where your technical judgment carries real weight.
 Key Responsibilities 
 Post-Silicon Validation Leadership 
• Architect and drive end-to-end post-silicon validation plans, from first-silicon bring-up th

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